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ISL43140, ISL43141, ISL43142
Data Sheet July 2004 FN6032.1
Low-Voltage, Single and Dual Supply, High Performance, Quad SPST, Analog Switches
The Intersil ISL43140-ISL43142 devices are CMOS, precision, quad analog switches designed to operate from a single +2V to +12V supply or from a 2V to 6V supply. Targeted applications include battery powered equipment that benefit from the devices' low power consumption (1W), low leakage currents (1nA max), and fast switching speeds (tON = 30ns, tOFF = 18ns). A 12 maximum RON flatness ensures signal fidelity, while channel-to-channel mismatch is guaranteed to be less than 2.5. The 3mm x 3mm Quad NoLead Flatpack (QFN) package alleviates board space limitations, making this newest line of low-voltage switches an ideal solution. The ISL43140/ISL43141/ISL43142 are quad single-pole/ single-throw (SPST) devices. The ISL43140 has four normally closed (NC) switches; the ISL43141 has four normally open (NO) switches; the ISL43142 has two NO and two NC switches and can be used as a dual SPDT, or a dual 2:1 multiplexer. Table 1 summarizes the performance of this family.
TABLE 1. FEATURES AT A GLANCE ISL43140 Number of Switches Configuration 10.8V RON 10.8V tON / tOFF 4.5V RON 4.5V tON / tOFF 4.5V RON 4.5V tON / tOFF 2.7V RON 2.7V tON / tOFF Packages 4 All NC 50 30ns / 18ns 50 40ns / 15ns 110 50ns / 20ns 200 ISL43141 4 All NO 50 30ns / 18ns 50 40ns / 15ns 110 50ns / 20ns 200 ISL43142 4 2 NC / 2 NO 50 30ns / 18ns 50 40ns / 15ns 110 50ns / 20ns 200
Features
* Fully Specified at 5V, 12V, 5V, and 3V Supplies for 10% Tolerances * Four Separately Controlled SPST Switches * Pin Compatible with DG411/DG412/DG413 * ON Resistance (RON) . . . . . . . . . . . . . . . . . . . . . . . . 50 * RON Matching Between Channels. . . . . . . . . . . . . . . . . . . 2 * Low Charge Injection . . . . . . . . . . . . . . . . . . . . . . 5pC (Max) * Low Power Consumption (PD) . . . . . . . . . . . . . . . . . . . .<1W * Low Leakage Current (Max at 85C) . . . . . . . . . . . . . 5nA * Fast Switching Action - tON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30ns - tOFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18ns * Guaranteed Break-Before-Make (ISL43142 only) * Minimum 2000V ESD Protection per Method 3015.7 * TTL, CMOS Compatible * Pb-free Available
Applications
* Battery Powered, Handheld, and Portable Equipment - Cellular/Mobile Phones - Pagers - Laptops, Notebooks, Palmtops * Communications Systems - Military Radios - RF "Tee" Switches * Test Equipment - Ultrasound - Electrocardiograph * Heads-Up Displays * Audio and Video Switching * General Purpose Circuits - +3V/+5V DACs and ADCs - Digital Filters - Operational Amplifier Gain Switching Networks - High Frequency Analog Switching - High Speed Multiplexing
120ns / 25ns 120ns / 25ns 120ns / 25ns 16 Ld SOIC (N), 16 Ld 3x3 QFN, 16 Ld TSSOP
Related Literature
* Technical Brief TB363 "Guidelines for Handling and Processing Moisture Sensitive Surface Mount Devices (SMDs)"
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2002, 2004. All Rights Reserved All other trademarks mentioned are the property of their respective owners.
ISL43140, ISL43141, ISL43142 Pinouts
(Note 1) ISL43140 (SOIC, TSSOP) TOP VIEW
IN1 1 COM1 2 NC1 3 V- 4 GND 5 NC4 6 COM4 7 IN4 8 16 IN2 15 COM2 14 NC2 13 V+ 12 N.C. 11 NC3 10 COM3 9 IN3 GND NC4 3 4 5 COM4 6 IN4 7 IN3 8 COM3 10 N.C. 9 NC3 NC1 V1 2
ISL43140 (QFN) TOP VIEW
COM1 COM2 13 12 NC2 11 V+ 13 12 NO2 11 V+ 10 N.C. 9 5 COM4 6 IN4 7 IN3 8 COM3 NO3 13 12 NC2 11 V+ 10 N.C. 9 5 COM4 6 IN4 7 IN3 8 COM3 NC3 COM2 COM2 IN1 15 IN1 15 IN1 15 IN2 14 IN2 14 IN2 14
16
ISL43141 (SOIC, TSSOP) TOP VIEW
IN1 1 COM1 2 NO1 3 V- 4 GND 5 NO4 6 COM4 7 IN4 8 16 IN2 15 COM2 14 NO2 13 V+ V12 N.C. 11 NO3 10 COM3 9 IN3 GND NO4 3 4 2 NO1 1
ISL43141 (QFN) TOP VIEW
COM1 16 16 NO1 VGND NO4 1 2 3 4 COM1
ISL43142 (SOIC, TSSOP) TOP VIEW
IN1 1 COM1 2 NO1 3 V- 4 GND 5 NO4 6 COM4 7 IN4 8 16 IN2 15 COM2 14 NC2 13 V+ 12 N.C. 11 NC3 10 COM3 9 IN3
ISL43142 (QFN) TOP VIEW
NOTE: 1. Switches Shown for Logic "0" Input.
2
ISL43140, ISL43141, ISL43142 Truth Table
ISL43140 LOGIC 0 1 NOTE: ISL43141 ISL43142 SW 1, 2, 3, 4 SW 1, 2, 3, 4 SW 1, 4 SW 2, 3 ON OFF OFF ON OFF ON ON OFF
Ordering Information
PART NO. (BRAND) (NOTE 2) ISL43140IB ISL43140IBZ (Note 3) ISL43140IR (140I) FUNCTION Positive Power Supply Input ISL43140IRZ (140I) (Note 3) ISL43140IV ISL43140IVZ (Note 3) ISL43141IB ISL43141IBZ (Note 3) ISL43141IR (141I) ISL43141IRZ (141I) (Note 3) ISL43141IV ISL43141IVZ (Note 3) ISL43142IB ISL43142IBZ (Note 3) ISL43142IR (142I) ISL43142IRZ (142I) (Note 3) ISL43142IV ISL43142IVZ (Note 3) NOTES: 2. Most surface mount devices are available on tape and reel; add "-T" to suffix. 3. Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which is compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J Std-020B. TEMP. RANGE (C) -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 PACKAGE 16 Ld SOIC (N) PKG. DWG. # M16.15
16 Ld SOIC (N) (Pb-free) M16.15 16 Ld QFN 16 Ld QFN (Pb-free) 16 Ld TSSOP 16 Ld TSSOP (Pb-free) 16 Ld SOIC (N) L16.3x3 L16.3x3 M16.173 M16.173 M16.15
Logic "0" 0.8V. Logic "1" 2.4V.
Pin Descriptions
PIN V+ VGND IN COM NO NC N.C.
Negative Power Supply Input. Connect to GND for Single Supply Configurations. Ground Connection Digital Control Input Analog Switch Common Pin Analog Switch Normally Open Pin Analog Switch Normally Closed Pin No Internal Connection
16 Ld SOIC (N) (Pb-free) M16.15 16 Ld QFN 16 Ld QFN (Pb-free) 16 Ld TSSOP 16 Ld TSSOP (Pb-free) 16 Ld SOIC (N) L16.3x3 L16.3x3 M16.173 M16.173 M16.15
16 Ld SOIC (N) (Pb-free) M16.15 16 Ld QFN 16 Ld QFN (Pb-free) 16 Ld TSSOP 16 Ld TSSOP (Pb-free) L16.3x3 L16.3x3 M16.173 M16.173
3
ISL43140, ISL43141, ISL43142
Absolute Maximum Ratings
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to15V V+ to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to15V V- to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -15 to 0.3V All Other Pins (Note 4) . . . . . . . . . . . . . ((V-) - 0.3V) to ((V+) + 0.3V) Continuous Current (Any Terminal) . . . . . . . . . . . . . . . . . . . . . 10mA Peak Current, IN, NO, NC, or COM (Pulsed 1ms, 10% Duty Cycle, Max) . . . . . . . . . . . . . . . . . . 20mA ESD Rating (Per MIL-STD-883 Method 3015). . . . . . . . . . . . . .>2kV
Thermal Information
Thermal Resistance (Typical, Note 5) JA (C/W) 16 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . 115 16 Ld QFN Package. . . . . . . . . . . . . . . . . . . . . . . . . 75 16 Ld TSSOP Package . . . . . . . . . . . . . . . . . . . . . . 150 Maximum Junction Temperature (Plastic Package) . . . . . . . 150C Moisture Sensitivity (See Technical Brief TB363) All Other Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Level 1 QFN Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Level 2 Maximum Storage Temperature Range. . . . . . . . . . . . . -65C to 150C Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300C (SOIC and TSSOP - Lead Tips Only)
Operating Conditions
Temperature Range ISL4314XIX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40C to 85C
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES: 4. Signals on NC, NO, COM, or IN exceeding V+ or V- are clamped by internal diodes. Limit forward diode current to maximum current ratings. 5. JA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications: 5V Supply Test Conditions VSUPPLY = 4.5V to 5.5V, GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 6),
Unless Otherwise Specified PARAMETER ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG ON Resistance, RON RON Matching Between Channels, RON RON Flatness, RFLAT(ON) NO or NC OFF Leakage Current, INO(OFF) or INC(OFF) COM OFF Leakage Current, ICOM(OFF) COM ON Leakage Current, ICOM(ON) VS = 4.5V, ICOM = 1.0mA, VNO or VNC = 3V, See Figure 5 VS = 4.5V, ICOM = 1.0mA, VNO or VNC = 3V VS = 4.5V, ICOM = 1.0mA, VNO or VNC = 3V, Note 9 VS = 5.5V, VCOM = 4.5V, VNO or VNC = +4.5V, Note 8 VS = 5.5V, VCOM = 4.5V, VNO or VNC = +4.5V, Note 8 VS = 5.5V, VCOM = VNO or VNC = 4.5V, Note 8 Full 25 Full 25 Full 25 Full 25 Full 25 Full 25 Full Full Full VS = 5.5V, VIN = 0V or V+ VS = 4.5V, VNO or VNC = 3V, RL = 300, CL = 35pF, VIN = 0 to 3V, See Figure 1 VS = 4.5V, VNO or VNC = 3V, RL = 300, CL = 35pF, VIN = 0 to 3V, See Figure 1 VS = 5.5V, VNO or VNC = 3V, RL = 300, CL = 35pF, VIN = 0 to 3V, See Figure 3 CL = 1.0nF, VG = 0V, RG = 0, See Figure 2 f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7 f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7 Full 25 Full 25 Full Full 25 25 25 25 V-1 -5 -1 -5 -2 -10 2.4 -0.5 5 50 2 10 0.01 0.01 0.01 1.6 1.6 0.03 40 15 20 1 7 7 14 V+ 65 75 2.5 5 12 13 1 5 1 5 2 10 0.8 0.5 80 100 30 40 5 V nA nA nA nA nA nA V V A ns ns ns ns ns pC pF pF pF TEST CONDITIONS TEMP (C) (NOTE 7) MIN TYP (NOTE 7) MAX UNITS
DIGITAL INPUT CHARACTERISTICS Input Voltage High, VINH Input Voltage Low, VINL Input Current, IINH, IINL DYNAMIC CHARACTERISTICS Turn-ON Time, tON Turn-OFF Time, tOFF Break-Before-Make Time Delay (ISL43142), tD Charge Injection, Q COM OFF Capacitance, CCOM(OFF) COM ON Capacitance, CCOM(ON)
NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7
4
ISL43140, ISL43141, ISL43142
Electrical Specifications: 5V Supply Test Conditions VSUPPLY = 4.5V to 5.5V, GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 6),
Unless Otherwise Specified (Continued) PARAMETER OFF Isolation Crosstalk, Note 10 All Hostile Crosstalk Power Supply Rejection Ratio Power Supply Range Positive Supply Current, I+ Negative Supply Current, INOTES: 6. VIN = Input voltage to perform proper function. 7. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. 8. Leakage parameter is 100% tested at high temp, and guaranteed by correlation at 25C. 9. Flatness is defined as the delta between the maximum and minimum RON values over the specified voltage range. 10. Between any two switches. VS = 5.5V, VIN = 0V or V+, Switch On or Off TEST CONDITIONS RL = 50, CL = 15pF, f = 100kHz, VNO or VNC = 1VRMS, See Figures 4, 6, and 19 RL = 50, CL = 15pF, f = 10MHz, VNO or VNC = 1VRMS, See Figure 19 RL = 50, CL = 15pF, f = 1MHz, See Figure 20 TEMP (C) 25 25 25 25 Full 25 Full 25 Full (NOTE 7) MIN 2 -1 -1 -1 -1 TYP >90 <-90 -60 60 0.05 0.05 (NOTE 7) MAX UNITS 6 1 1 1 1 dB dB dB dB V A A A A
POWER SUPPLY CHARACTERISTICS
Electrical Specifications: 12V Supply
Test Conditions: V+ = +10.8V to +13.2V, V- = GND = 0V, VINH = 5V, VINL = 0.8V (Note 6), Unless Otherwise Specified TEST CONDITIONS TEMP (C) Full (NOTE 7) MIN 0 -1 -5 -1 -5 -2 -10 3.5 -1 0 TYP 50 60 2 8 9 3.1 30 34 18 20 8 (NOTE 7) MAX UNITS V+ 65 75 2.5 5 12 13 1 5 1 5 2 10 0.8 1 70 100 50 75 V nA nA nA nA nA nA V V A ns ns ns ns ns
PARAMETER ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG ON Resistance, RON RON Matching Between Channels, RON RON Flatness, RFLAT(ON) NO or NC OFF Leakage Current, INO(OFF) or INC(OFF) COM OFF Leakage Current, ICOM(OFF) COM ON Leakage Current, ICOM(ON)
V+ = 10.8V, ICOM = 1.0mA, VNO or VNC = 9V, See Figure 5 V+ = 10.8V, ICOM = 1.0mA, VNO or VNC = 9V V+ = 10.8V, ICOM = 1.0mA, VNO or VNC = 3V, 6V, 9V, Note 9 V+ = 13.2V, VCOM = 1V, 10V, VNO or VNC = 10V, 1V, Note 8 V+ = 13.2V, VCOM = 10V, 1V, VNO or VNC = 1V, 10V, Note 8 V+ = 13.2V, VCOM = 1V, 10V, or VNO or VNC = 1V, 10V, Note 8
25 Full 25 Full 25 Full 25 Full 25 Full 25 Full Full Full
DIGITAL INPUT CHARACTERISTICS Input Voltage High, VINH Input Voltage Low, VINL Input Current, IINH, IINL DYNAMIC CHARACTERISTICS Turn-ON Time, tON Turn-OFF Time, tOFF Break-Before-Make Time Delay (ISL43142), tD V+ = 10.8V, VNO or VNC = 10V, RL = 300, CL = 35pF, VIN = 0 to 3.3V, See Figure 1 V+ = 10.8V, VNO or VNC = 10V, RL = 300, CL = 35pF, VIN = 0 to 3.3V, See Figure 1 V+ = 13.2V, VNO or VNC = 10V, RL = 300, CL = 35pF, VIN = 0 to 3.3V, See Figure 3 25 Full 25 Full Full V+ = 13.2V, VIN = 0V or V+
Full
5
ISL43140, ISL43141, ISL43142
Electrical Specifications: 12V Supply
Test Conditions: V+ = +10.8V to +13.2V, V- = GND = 0V, VINH = 5V, VINL = 0.8V (Note 6), Unless Otherwise Specified (Continued) TEST CONDITIONS CL = 1.0nF, VG = 0V, RG = 0, See Figure 2 RL = 50, CL = 15pF, f = 100kHz, VNO or VNC = 1VRMS, See Figures 4, 6, and 19 RL = 50, CL = 15pF, f = 10MHz, VNO or VNC = 1VRMS, See Figure 19 RL = 50, CL = 15pF, f = 1MHz, See Figure 20 f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7 f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7 V+ = 13.2V, VIN = 0V or V+, Switch On or Off TEMP (C) 25 25 25 25 25 25 25 25 25 Full Negative Supply Current, I25 Full (NOTE 7) MIN -1 -1 -1 -1 TYP 5 >90 <-90 -60 60 7 7 14 0.05 0.05 (NOTE 7) MAX UNITS 15 1 1 1 1 pC dB dB dB dB pF pF pF A A A A
PARAMETER Charge Injection, Q OFF Isolation Crosstalk, Note 10 All Hostile Crosstalk Power Supply Rejection Ratio COM OFF Capacitance, CCOM(OFF) COM ON Capacitance, CCOM(ON) Positive Supply Current, I+
NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7
POWER SUPPLY CHARACTERISTICS
Electrical Specifications: 5V Supply
Test Conditions: V+ = +4.5V to +5.5V, V- = GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 6), Unless Otherwise Specified TEST CONDITIONS TEMP (C) Full MIN (NOTE 7) 0 -1 -5 -1 -5 -2 -10 2.4 -0.5 10 TYP 110 1.5 12 0.01 0.01 1.6 1.6 0.03 50 20 30 1 >90 <-90 MAX (NOTE 7) UNITS V+ 120 150 2 5 16 20 1 5 1 5 2 10 0.8 0.5 100 150 50 75 5 V nA nA nA nA nA nA V V A ns ns ns ns ns pC dB dB
PARAMETER ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG ON Resistance, RON RON Matching Between Channels, RON RON Flatness, RFLAT(ON) NO or NC OFF Leakage Current, INO(OFF) or INC(OFF) COM OFF Leakage Current, ICOM(OFF) COM ON Leakage Current, ICOM(ON)
V+ = 4.5V, ICOM = 1.0mA, VNO or VNC = 3.5V, See Figure 5 V+ = 4.5V, ICOM = 1.0mA, VNO or VNC = 3.5V V+ = 4.5V, ICOM = 1.0mA, VNO or VNC = 1.5V to 4.5V, Note 9 V+ = 5.5V, VCOM = 1V, 4.5V, VNO or VNC = 4.5V, 1V, Note 8 V+ = 5.5V, VCOM = 1V, 4.5V, VNO or VNC = 4.5V, 1V, Note 8 V+ = 5.5V, VCOM = 1V, 4.5V, Note 8
25 Full 25 Full 25 Full 25 Full 25 Full 25 Full Full Full
DIGITAL INPUT CHARACTERISTICS Input Voltage High, VINH Input Voltage Low, VINL Input Current, IINH, IINL DYNAMIC CHARACTERISTICS Turn-ON Time, tON Turn-OFF Time, tOFF Break-Before-Make Time Delay (ISL43142), tD Charge Injection, Q OFF Isolation Crosstalk, Note 10 V+ = 4.5V, VNO or VNC = 3V, RL = 300, CL = 35pF, VIN = 0 to 3V, See Figure 1 V+ = 4.5V, VNO or VNC = 3V, RL = 300, CL = 35pF, VIN = 0 to 3V, See Figure 1 V+ = 5.5V, VNO or VNC = 3V, RL = 300, CL = 35pF, VIN = 0 to 3V, See Figure 3 CL = 1.0nF, VG = 0V, RG = 0, See Figure 2 RL = 50, CL = 15pF, f = 100kHz, VNO or VNC = 1VRMS, See Figures 4, 6, and 19 25 Full 25 Full Full 25 25 25 V+ = 5.5V, VIN = 0V or V+
Full
6
ISL43140, ISL43141, ISL43142
Electrical Specifications: 5V Supply
Test Conditions: V+ = +4.5V to +5.5V, V- = GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 6), Unless Otherwise Specified (Continued) TEST CONDITIONS RL = 50, CL = 15pF, f = 10MHz, VNO or VNC = 1VRMS, See Figure 19 RL = 50, CL = 15pF, f = 1MHz, See Figure 20 f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7 f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7 V+ = 5.5V, VIN = 0V or V+, Switch On or Off TEMP (C) 25 25 25 25 25 25 Full Negative Supply Current, I25 Full MIN (NOTE 7) -1 -1 -1 -1 TYP -60 60 7 7 14 0.05 0.05 MAX (NOTE 7) UNITS 1 1 1 1 dB dB pF pF pF A A A A
PARAMETER All Hostile Crosstalk Power Supply Rejection Ratio COM OFF Capacitance, CCOM(OFF) COM ON Capacitance, CCOM(ON) Positive Supply Current, I+
NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7
POWER SUPPLY CHARACTERISTICS
Electrical Specifications: 3V to 3.3V Supply
Test Conditions: V+ = +2.7V to +3.6V, V- = GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 6), Unless Otherwise Specified TEMP (C) Full MIN (NOTE 7) 0 -1 -5 -1 -5 -2 -10 2.4 -0.5 15 TYP 200 2 80 0.01 0.01 1.6 1.6 0.03 120 25 50 0.5 >90 <-90 -60 60 MAX (NOTE 7) UNITS V+ 250 270 4 6 100 120 1 5 1 5 2 10 0.8 0.5 180 220 45 60 5 V nA nA nA nA nA nA V V A ns ns ns ns ns pC dB dB dB dB
PARAMETER ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG ON Resistance, RON RON Matching Between Channels, RON RON Flatness, RFLAT(ON) NO or NC OFF Leakage Current, INO(OFF) or INC(OFF) COM OFF Leakage Current, ICOM(OFF) COM ON Leakage Current, ICOM(ON)
TEST CONDITIONS
V+ = 2.7V, ICOM = 1.0mA, VNO or VNC = 1V, See Figure 5 V+ = 2.7V, ICOM = 1.0mA, VNO or VNC = 1V V+ = 2.7V, ICOM = 1.0mA, VNO or VNC = 0.5V to 1.5V, Note 9 V+ = 3.6V, VCOM = 1V, 2.6V, VNO or VNC = 2.6V, 1V, Note 8 V+ = 3.6V, VCOM = 1V, 2.6V, VNO or VNC = 2.6V, 1V, Note 8 V+ = 3.6V, VCOM = 1V, 2.6V, Note 8
25 Full 25 Full 25 Full 25 Full 25 Full 25 Full Full Full
DIGITAL INPUT CHARACTERISTICS Input Voltage High, VINH Input Voltage Low, VINL Input Current, IINH, IINL DYNAMIC CHARACTERISTICS Turn-ON Time, tON Turn-OFF Time, tOFF Break-Before-Make Time Delay (ISL43142), tD Charge Injection, Q OFF Isolation Crosstalk, Note 10 All Hostile Crosstalk Power Supply Rejection Ratio V+ = 2.7V, VNO or VNC = 1.5V, RL = 300, CL = 35pF, VIN = 0 to V+, See Figure 1 V+ = 2.7V, VNO or VNC = 1.5V, RL = 300, CL = 35pF, VIN = 0 to V+, See Figure 1 V+ = 3.6V, VNO or VNC = 1.5V, RL = 300, CL = 35pF, VIN = 0 to 3V, See Figure 3 CL = 1.0nF, VG = 0V, RG = 0, See Figure 2 RL = 50, CL = 15pF, f = 100kHz, VNO or VNC = 1VRMS, See Figures 4, 6, and 19 RL = 50, CL = 15pF, f = 10MHz, VNO or VNC = 1VRMS, See Figure 19 RL = 50, CL = 15pF, f = 1MHz, See Figure 20 25 Full 25 Full 25 25 25 25 25 25 V+ = 3.6V, VIN = 0V or V+
Full
7
ISL43140, ISL43141, ISL43142
Electrical Specifications: 3V to 3.3V Supply
Test Conditions: V+ = +2.7V to +3.6V, V- = GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 6), Unless Otherwise Specified (Continued) TEMP (C) 25 25 25 25 Full Negative Supply Current, I25 Full MIN (NOTE 7) -1 -1 -1 -1 TYP 7 7 14 0.05 0.05 MAX (NOTE 7) UNITS 1 1 1 1 pF pF pF A A A A
PARAMETER COM OFF Capacitance, CCOM(OFF) COM ON Capacitance, CCOM(ON) Positive Supply Current, I+
TEST CONDITIONS f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7 f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7 V+ = 3.6V, VIN = 0V or V+, Switch On or Off
NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7
POWER SUPPLY CHARACTERISTICS
Test Circuits and Waveforms
3V LOGIC INPUT 0V tOFF SWITCH VNX INPUT VOUT 90% SWITCH OUTPUT 0V tON 90% GND LOGIC INPUT VC VNX 50% tr < 20ns tf < 20ns C SWITCH INPUT NO or NC COM IN RL 300 CL 35pF VOUT V+ C
Logic input waveform is inverted for switches that have the opposite logic sense.
Repeat test for all switches. CL includes fixture and stray capacitance. RL -----------------------------V OUT = V (NO or NC) R + R L ( ON ) FIGURE 1B. TEST CIRCUIT
FIGURE 1A. MEASUREMENT POINTS FIGURE 1. SWITCHING TIMES
V+
C
SWITCH OUTPUT VOUT
VOUT
RG
NO or NC
COM
VOUT
3V LOGIC INPUT ON OFF 0V Q = VOUT x CL C VON VG GND IN CL
LOGIC INPUT
Logic input waveform is inverted for switches that have the opposite logic sense. FIGURE 2A. MEASUREMENT POINTS
Repeat test for all switches. CL includes fixture and stray capacitance. FIGURE 2B. TEST CIRCUIT
FIGURE 2. CHARGE INJECTION
8
ISL43140, ISL43141, ISL43142 Test Circuits and Waveforms (Continued)
V+ C
3V LOGIC INPUT 0V VNX
C
NO1
VOUT1 COM1 VOUT2 RL1 300 CL1 35pF
NC2
COM2 SWITCH OUTPUT VOUT1 90% 0V LOGIC INPUT 90% IN1 RL2 300
IN2 GND
CL2 35pF
SWITCH OUTPUT VOUT2
90% 0V
90%
tD
tD
C V-
CL includes fixture and stray capacitance. Reconfigure accordingly to test SW3 and SW4. FIGURE 3A. MEASUREMENT POINTS FIGURE 3B. TEST CIRCUIT
FIGURE 3. BREAK-BEFORE-MAKE TIME (ISL43142 ONLY)
V+ C SIGNAL GENERATOR RON = V1/1mA
NO or NC NO or NC
V+ C
VNX IN 0V or 2.4V 1mA V1 IN 0.8V or 2.4V
ANALYZER RL
COM
GND
COM
GND C VV-
C
Repeat test for all switches. FIGURE 4. OFF ISOLATION TEST CIRCUIT
V+ C
Repeat test for all switches. FIGURE 5. RON TEST CIRCUIT
V+
SIGNAL GENERATOR
NO1 or NC1
COM1
50
NO or NC
IN1 0V or 2.4V IN2 0V or 2.4V NO CONNECTION IMPEDANCE ANALYZER
COM
IN
0V or 2.4V
ANALYZER RL
COM2
NO2 or NC2
GND
GND
C V-
V-
FIGURE 6. CROSSTALK TEST CIRCUIT
FIGURE 7. CAPACITANCE TEST CIRCUIT
9
ISL43140, ISL43141, ISL43142 Detailed Description
The ISL43140-ISL43142 quad analog switches offer precise switching capability from a bipolar 2V to 6V or a single 2V to 12V supply with low on-resistance (50) and high speed switching (tON = 40ns, tOFF = 15ns). The devices are especially well suited to portable battery powered equipment thanks to the low operating supply voltage (2V), low power consumption (1W), low leakage currents (1nA max), and the tiny QFN packaging. High frequency applications also benefit from the wide bandwidth, and the very high off isolation and crosstalk rejection.
Power-Supply Considerations
The ISL4314X construction is typical of most CMOS analog switches, in that they have three supply pins: V+, V-, and GND. V+ and V- drive the internal CMOS switches and set their analog voltage limits, so there are no connections between the analog signal path and GND. Unlike switches with a 13V maximum supply voltage, the ISL4314X 15V maximum supply voltage provides plenty of room for the 10% tolerance of 12V supplies (6V or 12V single supply), as well as room for overshoot and noise spikes. This family of switches performs equally well when operated with bipolar or single voltage supplies. The addition of the GND pin allows for asymmetrical bipolar supplies (e.g. +5V and -3V). The minimum recommended supply voltage is 2V or 2V. It is important to note that the input signal range, switching times, and on-resistance degrade at lower supply voltages. Refer to the electrical specification tables and Typical Performance Curves for details. V+ and GND power the internal logic (thus setting the digital switching point) and level shifters. The level shifters convert the logic levels to switched V+ and V- signals to drive the analog switch gate terminals, so switch parameters especially RON - are strongly influenced by V-.
Supply Sequencing And Overvoltage Protection
With any CMOS device, proper power supply sequencing is required to protect the device from excessive input currents which might permanently damage the IC. All I/O pins contain ESD protection diodes from the pin to V+ and to V- (see Figure 8). To prevent forward biasing these diodes, V+ and V- must be applied before any input signals, and input signal voltages must remain between V+ and V-. If these conditions cannot be guaranteed, then one of the following two protection methods should be employed. Logic inputs can easily be protected by adding a 1k resistor in series with the input (see Figure 8). The resistor limits the input current below the threshold that produces permanent damage, and the sub-microamp input current produces an insignificant voltage drop during normal operation. Adding a series resistor to the switch input defeats the purpose of using a low RON switch, so two small signal diodes can be added in series with the supply pins to provide overvoltage protection for all pins (see Figure 8). These additional diodes limit the analog signal from 1V below V+ to 1V above V-. The low leakage current performance is unaffected by this approach, but the switch resistance may increase, especially at low supply voltages.
Logic-Level Thresholds
V+ and GND power the internal logic stages, so V- has no affect on logic thresholds. This switch family is TTL compatible (0.8V and 2.4V) over a V+ supply range of 2.5V to 10V (see Figure 17). At 12V the VIH level is about 2.7V, so for best results use a logic family the provides a VOH greater than 3V. The digital input stages draw supply current whenever the digital input voltage is not at one of the supply rails. Driving the digital input signals from GND to V+ with a fast transition time minimizes power dissipation.
High-Frequency Performance
OPTIONAL PROTECTION DIODE V+ OPTIONAL PROTECTION RESISTOR INX VNO or NC VCOM
In 50 systems, signal response is reasonably flat even past 100MHz (see Figure 18). Figure 18 also illustrates that the frequency response is very consistent over a wide V+ range, and for varying analog signal levels. An off switch acts like a capacitor and passes higher frequencies with less attenuation, resulting in signal feedthrough from a switch's input to its output. Off Isolation is the resistance to this feedthrough, while Crosstalk indicates the amount of feedthrough from one switch to another. Figure 19 details the high Off Isolation and Crosstalk rejection provided by this family. At 10MHz, off isolation is about 50dB in 50 systems, decreasing approximately 20dB per decade as frequency increases. Higher load impedances decrease Off Isolation and Crosstalk rejection due to the voltage divider action of the switch OFF impedance and the load impedance.
VOPTIONAL PROTECTION DIODE
FIGURE 8. OVERVOLTAGE PROTECTION
10
ISL43140, ISL43141, ISL43142
Leakage Considerations
Reverse ESD protection diodes are internally connected between each analog-signal pin and both V+ and V-. One of these diodes conducts if any analog signal exceeds V+ or V-. Virtually all the analog leakage current comes from the ESD diodes to V+ or V-. Although the ESD diodes on a given signal pin are identical and therefore fairly well balanced, they are reverse biased differently. Each is biased by either V+ or V- and the analog signal. This means their leakages will vary as the signal varies. The difference in the two diode leakages to the V+ and V- pins constitutes the analog-signalpath leakage current. All analog leakage current flows between each pin and one of the supply terminals, not to the other switch terminal. This is why both sides of a given switch can show leakage currents of the same or opposite polarity. There is no connection between the analog signal paths and GND.
Typical Performance Curves TA = 25C, Unless Otherwise Specified
100 90 80 70 60 50 40 120 100 RON () 80 60 40 300 250 200 150 100 50 0 2 -40C V- = 0V 85C 25C -40C 3 4 5 6 7 8 V+ (V) 9 10 11 12 13 V- = -5V 85C 25C V- = -3V 85C 25C VCOM = (V+) - 1V ICOM = 1mA 250 200 150 -40C 100 50 135 115 RON () 95 75 55 80 70 60 50 40 30 20 85C 25C -40C 85C 25C -40C V+ = 3V V- = 0V ICOM = 1mA
V+ = 5V V- = 0V
85C
V+ = 12V 25C V- = 0V
-40C 0 1 2 3 4 5 6 7 VCOM (V) 8 9 10 11 12
FIGURE 9. ON RESISTANCE vs POSITIVE SUPPLY VOLTAGE
180 ICOM = 1mA 140 85C 100 -40C 60 120 RON () 100 80 60 40 90 85C 70 25C 50 30 -5 -4 -3 -2 -1 0 VCOM (V) 1 2 3 -40C 4 5 VS = 5V 85C 25C
FIGURE 10. ON RESISTANCE vs SWITCH VOLTAGE
VS = 2V
5
2.5 V+ = 3V 0 VS = 3V Q (pC) 25C -40C -5 -2.5 VS = 5V V+ = 5V V+ = 12V
-7.5
-10 -5 -2.5 0 2.5 5 VCOM (V) 7.5 10 12.5
FIGURE 11. ON RESISTANCE vs SWITCH VOLTAGE
FIGURE 12. CHARGE INJECTION vs SWITCH VOLTAGE
11
ISL43140, ISL43141, ISL43142 Typical Performance Curves TA = 25C, Unless Otherwise Specified (Continued)
300 50 VCOM = (V+) - 1V V- = 0V 250 40 200 tOFF (ns) tON (ns) VCOM = (V+) - 1V V- = 0V
150 85C 100 25C
30 85C 25C 20 -40C
50
-40C
0 2 3 4 5 6 7 V+ (V) 8 9 10 11 12
10 2 3 4 5 6 7 V+ (V) 8 9 10 11 12
FIGURE 13. TURN - ON TIME vs POSITIVE SUPPLY VOLTAGE
250 200 150 100 50 tON (ns) -40C 0
250 200 150 100 50 0
FIGURE 14. TURN - OFF TIME vs POSITIVE SUPPLY VOLTAGE
125 -40C 100 75 85C V- = -5V VCOM = (V+) - 1V
25C -40C 25C
V- = -5V
VCOM = (V+) - 1V
50 85C tOFF (ns) 25 -40C 0 300 250 200 150 -40C 25C
25C 85C
V- = -3V -40C 25C 85C -40C 2 3 4 5 6 7 V+ (V) 8 9 10 11 12
V- = -3V
100 50 0 2
85C 3 4 5 6 7 V+ (V) 8 9 10 11 12
FIGURE 15. TURN - ON TIME vs POSITIVE SUPPLY VOLTAGE
3.5 V- = 0V to -5V 3 -40C 25C VINH AND VINL (V) 2.5 VINH 2 -40C 1.5 VINL 1 85C 25C 85C
FIGURE 16. TURN - OFF TIME vs POSITIVE SUPPLY VOLTAGE
NORMALIZED GAIN (dB)
3 0
V+ = 2.7V (VIN = 2VP-P) VS = 2V (VIN = 3VP-P) or V+ = 5V (VIN = 4VP-P) GAIN VS = 5V (VIN = 5VP-P)
-3 V+ = 2.7V (VIN = 2VP-P) 0 PHASE VS = 2V (VIN = 3VP-P) V+ = 5V (VIN = 4VP-P) VS = 5V (VIN = 5VP-P) 45 90 135 180 PHASE (DEGREES)
0.5 2 3 4 5 6 7 V+ (V) 8 9 10 11 12 1
RL = 50 10 100 FREQUENCY (MHz) 600
FIGURE 17. DIGITAL SWITCHING POINT vs POSITIVE SUPPLY VOLTAGE
FIGURE 18. FREQUENCY RESPONSE
12
ISL43140, ISL43141, ISL43142 Typical Performance Curves TA = 25C, Unless Otherwise Specified (Continued)
-10 V+ = 3V to 12V or -20 VS = 2V to 5V RL = 50 -30 -40 CROSSTALK (dB) -50 -60 -70 -80 -90 -100 -110 1k ALL HOSTILE CROSSTALK ISOLATION 10 0 20 10 30 OFF ISOLATION (dB) 40 50 60 CROSSTALK 70 80 90 100 20 PSRR (dB) 30 40 50 60 -PSRR, SWITCH OFF 70 80 +PSRR, SWITCH OFF +PSRR, SWITCH ON 1 10 100 FREQUENCY (MHz) 1000 -PSRR, SWITCH ON V+ = 3V to 12V or VS = 2V to 5V RL = 50 VIN = 1VP-P
10k
100k
1M
10M
110 100M 500M
0.3
FREQUENCY (Hz)
FIGURE 19. CROSSTALK AND OFF ISOLATION
FIGURE 20. PSRR vs FREQUENCY
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP): VTRANSISTOR COUNT: ISL43140: 188 ISL43141: 188 ISL43142: 188 PROCESS: Si Gate CMOS
13
ISL43140, ISL43141, ISL43142 Small Outline Plastic Packages (SOIC)
N INDEX AREA H E -B1 2 3 SEATING PLANE -AD -CA h x 45o 0.25(0.010) M BM
M16.15 (JEDEC MS-012-AC ISSUE C) 16 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
INCHES SYMBOL A A1 B MIN 0.053 0.004 0.014 0.007 0.386 0.150 MAX 0.069 0.010 0.019 0.010 0.394 0.157 MILLIMETERS MIN 1.35 0.10 0.35 0.19 9.80 3.80 MAX 1.75 0.25 0.49 0.25 10.00 4.00 NOTES 9 3 4 5 6 7 8o Rev. 1 02/02
L
C D E e H h
C
0.050 BSC 0.228 0.010 0.016 16 0o 8o 0.244 0.020 0.050
1.27 BSC 5.80 0.25 0.40 16 0o 6.20 0.50 1.27
e
B 0.25(0.010) M C AM BS

A1 0.10(0.004)
L N
NOTES: 1. Symbols are defined in the "MO Series Symbol List" in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension "E" does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. "L" is the length of terminal for soldering to a substrate. 7. "N" is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width "B", as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch) 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact.
14
ISL43140, ISL43141, ISL43142 Thin Shrink Small Outline Plastic Packages (TSSOP)
N INDEX AREA E E1 -B1 2 3 L 0.05(0.002) -AD -CSEATING PLANE A 0.25 0.010 GAUGE PLANE 0.25(0.010) M BM
M16.173
16 LEAD THIN SHRINK SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL A A1 A2 b c D MIN 0.002 0.033 0.0075 0.0035 0.193 0.169 MAX 0.043 0.006 0.037 0.012 0.008 0.201 0.177 MILLIMETERS MIN 0.05 0.85 0.19 0.09 4.90 4.30 MAX 1.10 0.15 0.95 0.30 0.20 5.10 4.50 NOTES 9 3 4 6 7 8o Rev. 1 2/02
A1 0.10(0.004) A2 c
E1 e E L N
e
b 0.10(0.004) M C AM BS
0.026 BSC 0.246 0.020 16 0o 8o 0.256 0.028
0.65 BSC 6.25 0.50 16 0o 6.50 0.70
NOTES: 1. These package dimensions are within allowable dimensions of JEDEC MO-153-AB, Issue E. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension "E1" does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.15mm (0.006 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. "L" is the length of terminal for soldering to a substrate. 7. "N" is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension "b" does not include dambar protrusion. Allowable dambar protrusion shall be 0.08mm (0.003 inch) total in excess of "b" dimension at maximum material condition. Minimum space between protrusion and adjacent lead is 0.07mm (0.0027 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. (Angles in degrees)
15
ISL43140, ISL43141, ISL43142 Quad Flat No-Lead Plastic Package (QFN) Micro Lead Frame Plastic Package (MLFP)
2X A 9 D1 D1/2 6 INDEX AREA N 1 2 3 E1/2 E1 9 2X 0.15 C B 2X 0.15 C A 4X 0 TOP VIEW A2 B E/2 E 2X 0.15 C B D D/2 0.15 C A
L16.3x3
16 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE MILLIMETERS SYMBOL A A1 A2 A3 b D D1 D2 E E1 E2 1.35 0.20 0.30 e k L N Nd Ne P 1.35 0.18 MIN 0.80 NOMINAL 0.90 0.20 REF 0.23 3.00 BSC 2.75 BSC 1.50 3.00 BSC 2.75 BSC 1.50 0.50 BSC 0.40 16 4 4 0.60 12 0.50 1.65 1.65 0.30 MAX 1.00 0.05 1.00 NOTES 9 9 5, 8 9 7, 8, 10 9 7, 8, 10 8 2 3 3 9 9 Rev. 1 6/04
A
/ / 0.10 C 0.08 C
C
SEATING PLANE
SIDE VIEW NX b 5
A3
A1
9
4X P D2 (DATUM B) 4X P D2 2N
0.10 M C A B 7 8 NX k
1 (DATUM A) 6 INDEX AREA NX L Ne 8 (Nd-1)Xe REF. BOTTOM VIEW A1 NX b 5 2 3 E2 7 E2/2 8 (Ne-1)Xe REF.
NOTES: 1. Dimensioning and tolerancing conform to ASME Y14.5-1994. 2. N is the number of terminals. 3. Nd and Ne refer to the number of terminals on each D and E. 4. All dimensions are in millimeters. Angles are in degrees. 5. Dimension b applies to the metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. 6. The configuration of the pin #1 identifier is optional, but must be located within the zone indicated. The pin #1 identifier may be either a mold or mark feature. 7. Dimensions D2 and E2 are for the exposed pads which provide improved electrical and thermal performance. 8. Nominal dimensions are provided to assist with PCB Land Pattern Design efforts, see Intersil Technical Brief TB389.
C L
9 CORNER OPTION 4X
SECTION "C-C" C L
9. Features and dimensions A2, A3, D1, E1, P & are present when Anvil singulation method is used and not present for saw singulation.
L1 e 10 L
L1 CC e
10
L
10. Compliant to JEDEC MO-220VEED-2 Issue C, except for the E2 and D2 MAX dimension.
TERMINAL TIP FOR EVEN TERMINAL/SIDE
FOR ODD TERMINAL/SIDE
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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